FPGA Development with PYNQ Z2, Python and Vivado

PYNQ is an open-source framework that enables programmers who want to use embedded systems to exploit the capabilities of Xilinx Zynq SoCs. It allows users to exploit custom hardware in the programmable logic without having to use ASIC-style CAD tools. Instead, the SoC is programmed in Python and the code is developed and tested directly on the embedded system. The programmable logic circuits are imported as hardware libraries and programmed through their APIs, in essentially the same way that software libraries are imported and programmed.

The framework combines four main elements:

  1. the use of a high-level productivity language, Python in this case;
  2. Python-callable hardware libraries based on FPGA overlays;
  3. a web-based architecture incorporating the open-source Jupyter Notebook infrastructure served from Zynq's embedded processors; and
  4. Jupyter Notebook's client-side, web apps.

The result is a web-centric programming environment that enables software programmers to work at higher levels of design abstraction and to re-use both software and hardware libraries.

This course will provide a hands-on introduction to PYNQ framework using PYNQ-Z2 board. It will feature the latest PYNQ release which includes an updated API, an optimized video pipeline, a simplified way of integrating new hardware and drivers into PYNQ, and developing, compiling, and deploying C-language code straight from the Jupyter notebook without opening Xilinx SDK tool.

Course Outline:

Day 1

Introduction to the PYNQ Architecture

PYNQ Design Flow

PYNQ Development Methodologies

Labs:

  • · Getting started with Jupyter Notebooks
  • · Getting started with IPython
  • · Exploring PYNQ-Z2
  • · Programming on-board peripherals

 Introduction to overlays

Labs:

  • · Peripherals: Grove Temp sensor
  • · Peripherals: PmodOLED
  • · Peripherals: Grove LED bar (optional)
  • · Peripherals: Grove ALS sensor (optional)

PynqIOPs

logictoolsoverlay

Labs:

  • · Using Wavedrom
  • · Using Boolean generator
  • · Using Pattern generator
  • · Using FSM generator (optional)\

Overlay Design Methodology
Labs:

  • · Using GPIO/MMIO with PL slaves
  • · Memory allocation with Xlnk
  • · Accessing DRAM from PL masters
  • · Using DMA with AXI streams

Day 2

PYNQ with Python_OpenCV

Machine learning with Python and Pynq

 

 

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